Various methods have been employed to pattern and release microstructures and nanostructures. In particular, CMOS fabrication methods generally include reiterative photolithography steps to selectively pattern, etch, develop, and align functional layers. Such steps are repeated numerous times to provide the desired architecture and usually involve wet chemistry (e.g., use of solvents or solutions that require processing, such as casting, annealing, developing, etc.). Due to such wet chemistry steps, fabrication methods must be carefully designed, so that sensitive components will not be exposed to harsh chemical step or high temperature annealing steps. Additional tools and methods are desired that provide orthogonal fabrication methods. In addition, simplified tools and methods for back-end-of-line processing would be beneficial.